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Active Keyword: Memory System Designer and Place and Route Engineer Remove filter Location: Austin Remove filter Clear all

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Memory System Designer and Place and Route Engineer

Broadcom

Austin, TX 6 days ago $109,700–$175,500
Actively hiring Confirmed live today Posted this week High trust Below market
Verilog RTL Physical Design STA DRC EM/IR Synthesis Python Logical Equivalency Memory Subsystem Design Gate Netlist Synthesis Automation Scripts
8+ yrs exp
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