Senior Power Analysis and Optimization Engineer

What you'll do

• Analyze full-chip and unit-level power using advanced tools to identify design improvements.
• Develop and deploy ML/RL-based models for dynamic power management and anomaly detection.
• Train LLMs to assist engineers in interpreting complex power data and proposing optimizations.
• Conduct comparative power analysis across workloads to uncover optimization opportunities.
• Prototype new architectural features focusing on their energy implications using Verilog.
• Automate power analysis flows with Python, Perl, and C++ to enhance efficiency.
• Apply AI techniques to recommend or automatically tune power-efficient design configurations.

What we're looking for

• MS (or equivalent) in EE/CE/CS with 5+ years or PhD with 3+ years of relevant experience.
• Strong expertise in energy consumption, power estimation, data movement, and low-power design principles.
• Proficiency in Verilog and hands-on experience with ASIC design tools like PowerArtist and PrimePower.
• Solid coding skills in Python, Perl, and C++ for automation and scaling power analysis flows.
• Experience or strong interest in applying machine learning, reinforcement learning, and data analytics to EDA and system-level optimization.
• Familiarity with building and using LLMs as engineering copilots for EDA/power/architecture workflows.