Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

Nvidia

Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$168,000–$264,500 / yr
Posted
2 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $206k
This role $216k
$147k most similar roles pay here $277k

This role pays more than 67% of similar roles. Most pay $177,250–$235,750 — the shaded band above. At the midpoint, this role pays about $216k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 563 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 556 roles with salary data.

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At a glance

TL;DR · Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

NVIDIA is hiring a Senior Design Verification Engineer specializing in tools and automation to enhance efficiency within its High Speed IO engineering teams, impacting product lines from consumer graphics to supercomputers. This role involves improving front-end integration, build, and verification flows for high-speed IO systems, applying industry-leading tools to streamline processes, and collaborating with architects, designers, and engineers to optimize workflows. The ideal candidate will have 8+ years of experience in ASIC design and verification methodology, proficiency in Python or Perl, fluency in SystemVerilog, and expertise in continuous integration pipelines using Jenkins. Additionally, knowledge of VCS simulation tools, Verdi interactive debuggers, and Make-based build systems is essential, along with a strong background in verification mindset and the ability to tackle complex infrastructure issues.

What you'll do

  • Improve speed, flexibility, and extensibility of High-Speed IO front-end integration.
  • Apply best-in-class internal and industry tools to simplify work processes.
  • Keep High-Speed IO Continuous Integration system at the cutting edge.
  • Deploy tracking metrics to resolve operational issues and improve productivity.
  • Remove inefficiencies in verification and deployment flows throughout development.

What we're looking for

  • 8+ years of relevant industry experience in ASIC design and verification methodology.
  • Proficiency in Python, Perl, or another systems programming language.
  • Fluency in Object-Oriented Programming with SystemVerilog.
  • Experience with Continuous Integration pipelines and Jenkins.
  • Expertise in VCS simulation tools and debug tools like Verdi interactive.
  • Ability to improve efficiency and flexibility of High-Speed IO verification flows.
  • Strong verification mindset and experience applying AI to solve problems.

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