Principal DDR Validation Engineer

Arm Holdings

Hybrid

Quick summary

Work type: Hybrid
Location: Austin, TX
Salary: $249,900–$338,100 / yr
Posted: 1 day ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $189k

This role $294k

$123k most similar roles pay here $361k

This role pays more than 98% of similar roles. Most pay $161,825–$216,250 — the shaded band above. At the midpoint, this role pays about $294k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 39 open roles on FindRole.

Listed pay typically runs $184,500–$249,600 across 39 roles with salary data.

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View all roles at Arm Holdings

At a glance

TL;DR · Principal DDR Validation Engineer

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As a Senior Functional Validation Engineer on the next-generation compute solutions team, you will drive validation specifications and methodologies for complex subsystems, working closely with architecture, design, verification, implementation, modeling, performance analysis, software development, FPGA, and board development engineers. Your daily tasks include developing robust validation methodologies, creating test plans, executing validations, and ensuring the successful delivery of validated subsystems using innovative technologies and tools. The role requires extensive experience in silicon validation for sophisticated SoCs/ASICs with multi-core CPU/GPU subsystems and high-speed interfaces like PCIe/CXL, DDRx/LPDDRx, HBM, and Ethernet. You must be proficient in C, C++, shell scripting (Tcl, Perl, Python), and possess deep knowledge of computer architectures, systems, and processor-based system designs.

Skills

C C++ Python Tcl Perl SoC Validation Silicon Validation Computer Architectures Processor based system designs PCIe CXL DDRx LPDDRx HBM ASIC validation FPGA validation Emulation

What you'll do

Develop robust validation methodologies for complex subsystems in system environments.
Own the validation of IP and complex subsystems within next-generation compute solutions.
Create detailed validation specifications and documentation for sophisticated designs.
Execute validation test plans using C, C++, and other programming languages.
Collaborate on use-case validation across emulation, FPGA, and development boards.
Ensure comprehensive coverage in validation by working through all stages of silicon validation.

What we're looking for

15+ years of experience in silicon validation for complex SoCs/ASICs.
Expertise in validating multi-core CPU/GPU subsystems and high-speed interfaces.
Proficient in developing validation test content using C, C++, and scripting languages.
Deep understanding of computer architectures and systems, including processor-based designs.
Ability to create robust validation methodologies and specifications for sophisticated designs.

Hybrid

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Hardware Validation Engineer

Oracle

Santa Clara, CA 27 days ago $70,600–$141,200

Linux Bash Shell scripting PCIe DDR I2C/SMBus SPI High-speed scopes Differential probes Printed Circuit Board design Signal integrity validation Power delivery validation Thermal validation Liquid cooling systems Root-cause analysis Electrical Engineering Problem Solving Test Script Automation

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