FPGA Verification Engineer, Air Vehicles

Anduril Industries

Quick summary

Work type
On-site
Location
Costa Mesa, CA
Salary
$123,000–$171,000 / yr
Posted
2 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $186k
This role $147k
$111k most similar roles pay here $232k

This role pays less than 84% of similar roles. Most pay $156,412–$216,250 — the shaded band above. At the midpoint, this role pays about $147k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About Anduril Industries

Anduril Industries is a defense technology company that builds advanced hardware and software systems for national security, including autonomous drones, surveillance systems, and the Lattice AI command platform.

Anduril Industries currently has 1993 open roles on FindRole.

Listed pay typically runs $146,000–$194,000 across 1806 roles with salary data.

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View all roles at Anduril Industries

At a glance

TL;DR · FPGA Verification Engineer, Air Vehicles

Join our dynamic team in Costa Mesa, CA as an FPGA Verification Engineer, where you will own the verification of flight-critical avionics designs on AMD (Xilinx) platforms using UVM-based methodology. Your daily tasks include architecting and implementing UVM environments, developing verification plans, authoring SystemVerilog Assertions, building functional coverage models, and debugging failures at HDL and system levels. You’ll need expertise in SystemVerilog, object-oriented programming, and UVM, along with proficiency in simulators like Questa or VCS, Git workflows, and Linux development environments. Experience in avionics verification and knowledge of DO-254 safety standards are highly valued for this role focused on ensuring robust FPGA/SoC designs meet stringent industry requirements.

What you'll do

  • Architect and implement UVM verification environments for AMD (Xilinx) FPGA/SoC designs.
  • Develop verification plans with traceability to system and hardware requirements.
  • Author SystemVerilog Assertions for protocol compliance and design intent checks.
  • Build functional coverage models and drive code coverage analysis to closure.
  • Debug failures using waveform tools at the HDL and system level.

What we're looking for

  • 2+ years of FPGA/ASIC verification experience
  • Proficient in SystemVerilog, UVM methodology, and SVA
  • Experience with industry simulators (Questa, VCS, Xcelium, Vivado)
  • Object-oriented programming principles understanding
  • Eligible for U.S. Secret security clearance
  • Bachelor’s degree in Electrical Engineering or related field

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