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Silicon Design Verification Engineer in Austin, Texas | Advanced Micro Devices, Inc

Amd

Santa Clara, CA +3 100 days ago $121,680–$121,680
Actively hiring Verified listing Below market
SystemVerilog UVM VMM OVM Synopsys VCS Cadence IES AXI3/4 DDR4/5 HBM PCIe ASIC FPGA SOC NetWork on Chip (NOC) verification gate level simulation power verification reset verification contention checking abstraction techniques formal property checking tools Cadence IEV Jasper Synopsys VC-Formal Synopsys Magellan
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