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Camera Design Engineer

Qualcomm

San Diego, CA 109 days ago $148,300–$222,500
Actively hiring Competitive pay
Verilog VHDL RTL design Design Verification AHB AXI Image Processing Video Processing Graphics Processing Multimedia Processing DSP RTL sanity tools Design Rule Checking Clock Domain Crossing checks Synthesis Timing analysis Low power checks System Verilog System C TCL Perl Python shell-scripting
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