Senior Technical Program Manager – Silicon Co-design

Nvidia

Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$168,000–$258,750 / yr
Posted
27 days ago

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $200k
This role $213k
$155k most similar roles pay here $270k

This role pays more than 62% of similar roles. Most pay $177,250–$223,750 — the shaded band above. At the midpoint, this role pays about $213k versus about $200k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 992 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 979 roles with salary data.

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At a glance

TL;DR · Senior Technical Program Manager – Silicon Co-design

NVIDIA’s Silicon Co-Design Group seeks a Senior TPM to lead end-to-end program outcomes for complex SoC projects, requiring deep technical judgment and cross-functional alignment from architecture through tape-out. This role involves defining schedules, identifying integration risks early, making critical trade-offs, and driving process improvements that enhance speed and quality. Ideal candidates have 10+ years of experience in technical roles, with a proven track record of owning SoC programs and working across silicon, systems, software, operations, and marketing domains. Proficiency in AI as a tool for workflow optimization is essential, alongside hands-on knowledge of SoC design cycles, verification, and productization. Candidates should demonstrate the ability to use AI-powered program management tools effectively and have experience with inference infrastructure for AI-accelerated products.

What you'll do

  • Define and drive program schedules from architecture review through tape-out.
  • Surface dependencies before they block work and ensure multi-functional alignment.
  • Participate in critical design reviews to flag scope and integration risks early.
  • Make trade-off decisions that engineers respect, balancing schedule vs. quality.
  • Act as the primary technical link across silicon, systems, software, operations.
  • Identify and mitigate technical and schedule risks proactively without deep expertise.
  • Implement durable process improvements based on lessons from completed programs.

What we're looking for

  • 10+ years of technical experience with at least 5 years in owning SoC programs from architecture through tape-out.
  • Deep hands-on understanding of SoC design cycles, verification, and productization stages.
  • Proven ability to work across silicon–system–software boundaries and drive resolution without being an expert in every domain.
  • Demonstrated track record running fast development cycles under uncertainty with transparency generation.
  • Uses AI deliberately as a force multiplier with demonstrated workflow impact, not just as a credential.
  • Experience using AI-powered program management tools that improve outcomes by automating status, risk flagging, and dependency tracking.
  • Evaluates and rolls out AI productivity tools like coding assistants and automated documentation to improve engineering velocity.

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