Memory Subsystem Performance Architect
Qualcomm
At a glance
AI generatedJoin Arm’s Productivity Engineering Group as an Emulation and FPGA Efficiency Architect, where you will enhance the performance and utilization of global hardware acceleration infrastructure. Your daily tasks include benchmarking workloads, optimizing scheduling mechanisms, integrating EDA vendor APIs for automation, collaborating with in-house scheduler teams to improve resource allocation, and developing data pipelines and dashboards for performance visualization. You should have expertise in hardware emulation and FPGA environments, experience with Linux-based scripting (Python, Bash), familiarity with Prometheus and Grafana, and a strong analytical approach to performance validation. This role involves working on large-scale verification environments and collaborating closely with EDA tool vendors like Cadence and Synopsys to drive continuous improvement and efficiency gains at scale.
Skills
What you'll do
What we're looking for
Market check
This $161,500–$218,500 range sits above 38% of similar postings on FindRole.
Peer median band
$161,800–$244,107
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$177,250–$235,750
Middle half of comparable postings.
Based on 240 comparable postings.
* 240 is the maximum number of comparable postings sampled.
Employer
Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.
Arm Holdings currently has 34 open roles on FindRole.
Listed pay typically runs $184,500–$249,600 across 34 roles with salary data.
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